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| a FEATURES 1.8 V to 5.5 V Single Supply 3 V Dual Supply 2.5 On Resistance 0.5 On Resistance Flatness 100 pA Leakage Currents 19 ns Switching Times Triple SPDT: ADG733 Quad SPDT: ADG734 Small TSSOP and QSOP Packages Low Power Consumption TTL/CMOS-Compatible Inputs APPLICATIONS Data Acquisition Systems Communication Systems Relay Replacement Audio and Video Switching Battery-Powered Systems S1B D1 S1A CMOS, 2.5 Low Voltage, Triple/Quad SPDT Switches ADG733/ADG734 FUNCTIONAL BLOCK DIAGRAMS ADG733 S3A D3 S3B S2A D2 S2B S2B LOGIC D2 S2A A0 A1 A2 EN S3B D3 S3A IN2 IN1 IN4 S1A D1 S1B S4A D2 S4B ADG734 IN3 SWITCHES SHOWN FOR A "1" INPUT LOGIC GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG733 and ADG734 are low voltage, CMOS devices comprising three independently selectable SPDT (single pole, double throw) switches and four independently selectable SPDT switches respectively. Low power consumption and operating supply range of 1.8 V to 5.5 V and dual 3 V make the ADG733 and ADG734 ideal for battery powered, portable instruments. All channels exhibit break-before-make switching action preventing momentary shorting when switching channels. An EN input on the ADG733 is used to enable or disable the device. When disabled, all channels are switched OFF. These 2-1 multiplexers/SPDT switches are designed on an enhanced submicron process that provides low power dissipation yet gives high switching speed, very low on resistance, high signal bandwidths and low leakage currents. On resistance is in the region of a few ohms, is closely matched between switches and very flat over the full signal range. These parts can operate equally well in either direction and have an input signal range which extends to the supplies. The ADG733 is available in small TSSOP and QSOP packages, while the ADG734 is available in a small TSSOP package. 1. Single/Dual Supply Operation. The ADG733 and ADG734 are fully specified and guaranteed with 3 V and 5 V single supply rails and 3 V dual supply rails. 2. Low On Resistance (2.5 typical). 3. Low Power Consumption (<0.01 W). 4. Guaranteed Break-Before-Make Switching Action. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2001 ADG733/ADG734-SPECIFICATIONS1 (V Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On-Resistance Match between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS tON tOFF ADG733 tON(EN) tOFF(EN) Break-Before-Make Time Delay, tD Charge Injection Off Isolation 2 DD =5V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.) B Version -40 C 25 C to +85 C 0 V to VDD 2.5 4.5 5.0 0.1 0.4 1.2 0.01 0.1 0.01 0.1 Unit V typ max typ max typ max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ dB typ dB typ MHz typ pF typ pF typ A typ A max Test Conditions/Comments VS = 0 V to VDD, IDS = 10 mA; Test Circuit 1 VS = 0 V to VDD, IDS = 10 mA VS = 0 V to VDD, IDS = 10 mA VDD = 5.5 V VD = 4.5 V/1 V, VS = 1 V/4.5 V; Test Circuit 2 VD = VS = 1 V, or 4.5 V; Test Circuit 3 0.5 0.3 0.5 2.4 0.8 0.005 0.1 4 19 34 7 12 20 40 7 12 13 1 3 -62 -82 -62 -82 200 11 34 0.001 1.0 VIN = VINL or VINH Channel-to-Channel Crosstalk -3 dB Bandwidth CS (OFF) CD, CS (ON) POWER REQUIREMENTS IDD RL = 300 , CL = 35 pF; VS = 3 V, Test Circuit 4 RL = 300 , CL = 35 pF; VS = 3 V, Test Circuit 4 RL = 300 , CL = 35 pF; VS = 3 V, Test Circuit 5 RL = 300 , CL = 35 pF; VS = 3 V, Test Circuit 5 RL = 300 , CL = 35 pF; VS = 3 V, Test Circuit 6 VS = 2 V, RS = 0 , CL = 1 nF; Test Circuit 7 RL = 50 , CL = 5 pF, f = 10 MHz; RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 8 RL = 50 , CL = 5 pF, f = 10 MHz; RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 9 RL = 50 , CL = 5 pF, Test Circuit 8 VDD = 5.5 V Digital Inputs = 0 V or 5.5 V NOTES 1 Temperature range is as follows: B Version: -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. -2- REV. 0 SPECIFICATIONS Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) 1 (VDD = 3 V ADG733/ADG734 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.) B Version -40 C 25 C to +85 C 0 V to VDD 6 11 12 0.1 0.4 3 Unit V typ max typ max typ nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ dB typ dB typ MHz typ pF typ pF typ A typ A max VIN = VINL or VINH Test Conditions/Comments On-Resistance Match between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS tON tOFF ADG733 tON(EN) tOFF(EN) Break-Before-Make Time Delay, tD Charge Injection Off Isolation 2 VS = 0 V to VDD, IDS = 10 mA; Test Circuit 1 VS = 0 V to VDD, IDS = 10 mA VS = 0 V to VDD, IDS = 10 mA VDD = 3.3 V VS = 3 V/1 V, VD = 1 V/3 V; Test Circuit 2 VS = VD = 1 V or 3 V; Test Circuit 3 0.01 0.1 0.01 0.1 0.3 0.5 2.0 0.4 0.005 0.1 4 28 55 9 16 29 60 9 16 22 1 3 -62 -82 -62 -82 200 11 34 0.001 1.0 Channel-to-Channel Crosstalk -3 dB Bandwidth CS (OFF) CD, CS (ON) POWER REQUIREMENTS IDD RL = 300 , CL = 35 pF; VS = 2 V, Test Circuit 4 RL = 300 , CL = 35 pF; VS = 2 V, Test Circuit 4 RL = 300 , CL = 35 pF; VS = 2 V, Test Circuit 5 RL = 300 , CL = 35 pF; VS = 2 V, Test Circuit 5 RL = 300 , CL = 35 pF; VS = 2 V, Test Circuit 6 VS = 1 V, RS = 0 , CL = 1 nF; Test Circuit 7 RL = 50 , CL = 5 pF, f = 10 MHz; RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 8 RL = 50 , CL = 5 pF, f = 10 MHz; RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 9 RL = 50 , CL = 5 pF, Test Circuit 8 VDD = 3.3 V Digital Inputs = 0 V or 3.3 V NOTES 1 Temperature ranges are as follows: B Version: -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. REV. 0 -3- ADG733/ADG734-SPECIFICATIONS1 DUAL SUPPLY Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On-Resistance Match between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS tON tOFF ADG733 tON(EN) tOFF(EN) Break-Before-Make Time Delay, tD Charge Injection Off Isolation 2 (VDD = +3 V 10%, VSS = -3 V 10%, GND = 0 V, unless otherwise noted.) B Version -40 C 25 C to +85 C VSS to VDD 2.5 4.5 5.0 0.1 0.4 1.2 0.01 0.1 0.01 0.1 Unit V typ max typ max typ max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ dB typ dB typ MHz typ pF typ pF typ A typ A max A typ A max Test Conditions/Comments VS = VSS to VDD, IDS = 10 mA; Test Circuit 1 VS = VSS to VDD, IDS = 10 mA VS = VSS to VDD, IDS = 10 mA VDD = +3.3 V, VSS = -3.3 V VS = +2.25 V/-1.25 V, VD = -1.25 V/+2.25 V; Test Circuit 2 VS = VD = +2.25 V/-1.25 V, Test Circuit 3 0.5 0.3 0.5 2.0 0.4 0.005 0.1 4 21 35 10 16 21 40 10 16 13 1 5 -62 -82 -62 -82 200 11 34 0.001 1.0 0.001 1.0 VIN = VINL or VINH Channel-to-Channel Crosstalk -3 dB Bandwidth CS (OFF) CD, CS (ON) POWER REQUIREMENTS IDD ISS RL = 300 , CL = 35 pF; VS = 1.5 V, Test Circuit 4 RL = 300 , CL = 35 pF; VS = 1.5 V, Test Circuit 4 RL = 300 , CL = 35 pF; VS = 1.5 V, Test Circuit 5 RL = 300 , CL = 35 pF; VS = 1.5 V, Test Circuit 5 RL = 300 , CL = 35 pF; VS = 1.5 V, Test Circuit 6 VS = 0 V, RS = 0 , CL = 1 nF; Test Circuit 7 RL = 50 , CL = 5 pF, f = 10 MHz; RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 8 RL = 50 , CL = 5 pF, f = 10 MHz; RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 9 RL = 50 , CL = 5 pF, Test Circuit 8 VDD = 3.3 V Digital Inputs = 0 V or 3.3 V VSS = -3.3 V Digital Inputs = 0 V or 3.3 V NOTES 1 Temperature range is as follows: B Version: -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. -4- REV. 0 ADG733/ADG734 ABSOLUTE MAXIMUM RATINGS 1 (TA = 25C unless otherwise noted) VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +7 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to -3.5 V Analog Inputs2 . . . . . . . . . . . . . . VSS - 0.3 V to VDD + 0.3 V or 30 mA, Whichever Occurs First Digital Inputs2 . . . . . . . . . . . . . . . . . -0.3 V to VDD + 0.3 V or 30 mA, Whichever Occurs First Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . .100 mA (Pulsed at 1 ms, 10% Duty Cycle max) Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 30 mA Operating Temperature Range Industrial (A, B Versions) . . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150C 16-Lead TSSOP, JA Thermal Impedance . . . . . . . 150.4C/W 20-Lead TSSOP, JA Thermal Impedance . . . . . . . . 143C/W 16-Lead QSOP, JA Thermal Impedance . . . . . . . 149.97C/W Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . . 300C IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . . . . 220C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, S or D will be clamped by internal diodes. Current should be limited to the maximum ratings given. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG733/ADG734 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ORDERING GUIDE Model ADG733BRU ADG733BRQ ADG734BRU Temperature Range -40C to +85C -40C to +85C -40C to +85C Package Description Thin Shrink Small Outline Package (TSSOP) Quarter Size Outline Package (QSOP) Thin Shrink Small Outline Package (TSSOP) Package Option RU-16 RQ-16 RU-20 PIN CONFIGURATIONS TSSOP/QSOP TSSOP IN1 1 S2B 1 S2A 2 S3B 3 D3 4 16 VDD 15 D2 S1A 2 D1 3 S1B 4 VSS 5 20 IN4 19 S4A 18 D4 ADG733 14 D1 ADG734 17 S4B TOP VIEW 13 S1B (Not to Scale) S3A 5 12 S1A EN 6 VSS 7 GND 8 11 A0 10 A1 9 A2 TOP VIEW 16 VDD (Not to Scale) 15 NC GND 6 S2B 7 D2 8 S2A 9 IN2 10 14 S3B 13 D3 12 S3A 11 IN3 NC = NO CONNECT REV. 0 -5- ADG733/ADG734 Table I. ADG733 Truth Table Table II. ADG734 Truth Table A2 X 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 EN 1 0 0 0 0 0 0 0 0 ON Switch None D1-S1A, D2-S2A, D3-S3A D1-S1B, D2-S2A, D3-S3A D1-S1A, D2-S2B, D3-S3A D1-S1B, D2-S2B, D3-S3A D1-S1A, D2-S2A, D3-S3B D1-S1B, D2-S2A, D3-S3B D1-S1A, D2-S2B, D3-S3B D1-S1B, D2-S2B, D3-S3B Logic 0 1 Switch A OFF ON Switch B ON OFF X = Don't Care. TERMINOLOGY VDD VSS Most Positive Power Supply Potential. Most Negative Power Supply in a Dual Supply Application. In single supply applications, this should be tied to ground close to the device. Positive Supply Current. Negative Supply Current. Ground (0 V) Reference. Source Terminal. May be an input or output. Drain Terminal. May be an input or output. Logic Control Input. Analog Voltage on Terminals D, S Ohmic Resistance between D and S. On Resistance Match between Any Two Channels, i.e., RONmax - RONmin Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal range. Source Leakage Current with the Switch "OFF." Channel Leakage Current with the Switch "ON." Maximum Input Voltage for Logic "0." Minimum Input Voltage for Logic "1." Input Current of the Digital Input. "OFF" Switch Source Capacitance. Measured with reference to ground. "ON" Switch Capacitance. Measured with reference to ground. CIN tON Digital Input Capacitance. Delay time measured between the 50% and 90% points of the digital inputs and the switch "ON" condition. Delay time measured between the 50% and 90% points of the digital input and the switch "OFF" condition. Delay time between the 50% and 90% points of the EN digital input and the switch "ON" condition. Delay time between the 50% and 90% points of the EN digital input and the switch "OFF" condition. "OFF" time measured between the 80% points of both switches when switching from one address state to another. A measure of the glitch impulse transferred from the digital input to the analog output during switching. A measure of unwanted signal coupling through an "OFF" switch. A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. The frequency at which the output is attenuated by 3 dBs. The Frequency Response of the "ON" Switch. IDD ISS GND S D IN VD (VS) RON RON RFLAT(ON) tOFF tON(EN) tOFF(EN) tOPEN Charge Injection Off Isolation Crosstalk IS (OFF) ID, IS (ON) VINL VINH IINL(IINH) CS (OFF) CD, CS(ON) Bandwidth On Response Insertion Loss The loss due to the ON resistance of the switch. -6- REV. 0 Typical Performance Characteristics-ADG733/ADG734 8 7 6 ON RESISTANCE - 8 TA = 25 C VSS = 0V VDD = 2.7V ON RESISTANCE - VDD = 3.3V VDD = 4.5V TA = 25 C 7 6 5 4 3 2 1 0 -3 VDD = +3.3V VSS = -3.3V -2 -1 0 1 2 3 ON RESISTANCE - VDD = +2.7V VSS = -2.7V 8 7 6 5 4 3 2 -40 C 1 0 +85 C +25 C VDD = 5V VSS = 0V 5 4 3 2 VDD = +3.0V VSS = -3.0V VDD = 5.5V 1 0 0 1 2 3 4 5 0 1 2 3 4 5 VD, VS, DRAIN OR SOURCE VOLTAGE - V VD, OR VS/DRAIN OR SOURCE VOLTAGE - V VD, OR VS DRAIN OR SOURCE VOLTAGE - V TPC 1. On Resistance as a Function of VD (VS) for Single Supply TPC 2. On Resistance as a Function of VD (VS) for Dual Supply TPC 3. On Resistance as a Function of VD (VS) for Different Temperatures, Single Supply 8 7 6 ON RESISTANCE - 8 0.1 VDD = +3.0V VSS = -3.0V 0.05 VDD = 5V VSS = GND TA = 25 C IS, ID (ON) 0 VDD = 3V VSS = 0V 7 6 5 4 +85 C 3 2 -40 C 1 0 -3 5 4 3 2 1 0 -40 C +25 C CURRENT - nA +85 C ON RESISTANCE - -0.05 IS (OFF) -0.1 +25 C 1.0 1.5 2.0 2.5 3.0 0 0.5 VD OR VS - DRAIN OR SOURCE VOLTAGE - V -2 -1 0 1 2 3 -0.15 0 1 2 3 4 5 VD, OR VS DRAIN OR SOURCE VOLTAGE - V VS (VD) - V TPC 4. On Resistance as a Function of VD (VS) for Different Temperatures, Single Supply TPC 5. On Resistance as a Function of VD (VS) for Different Temperatures, Dual Supply TPC 6. Leakage Currents as a Function of VD (VS) 0.10 0.08 0.06 CURRENT - nA 0.15 VDD = 3V VSS = GND TA = 25 C CURRENT - nA 0.25 0.10 VDD = +3V VSS = -3V TA = 25 C CURRENT - nA 0.20 0.15 VDD = +3V VSS = -3V VD = +2.25V/-1.25V VS = -1.25V/+2.25V VDD = 5V VSS = GND VD = 4.5V/1.0V VS = 1.0V/4.5V 0.04 0.02 0 -0.02 -0.04 -0.06 -0.08 -0.10 0 0.5 1.0 1.5 VS (VD) - V 2.0 2.5 3.0 IS (OFF) IS, ID (ON) 0.05 IS, ID (ON) 0 0.10 0.05 0 IS, ID (ON) -0.05 IS (OFF) -0.10 -0.15 -3 -0.05 -0.10 IS (OFF) -2 -1 0 VS (VD) - V 1 2 3 5 20 35 50 65 80 TEMPERATURE - C TPC 7. Leakage Currents as a Function of VD (VS) TPC 8. Leakage Currents as a Function of VD (VS) TPC 9. Leakage Currents as a Function of Temperature REV. 0 -7- ADG733/ADG734 0.25 0.20 0.15 CURRENT - nA 0.10 0.05 IS, ID (ON) 0 -0.05 IS (OFF) -0.10 5 20 35 50 65 80 VDD = 3V VSS = GND VD = 2.7V/1V VS = 1V/2.7V TIME - ns 40 35 0 VSS = GND tON, VDD = 3V ON RESPONSE - dB VDD = 5V TA = 25 C -2 30 25 tON, VDD = 5V 20 15 10 5 0 -20 0 tOFF, VDD = 3V tOFF, VDD = 5V -4 20 40 60 80 -6 10k 100k TEMPERATURE - C TEMPERATURE - C 10M 1M FREQUENCY - HZ 100M TPC 10. Leakage Currents as a Function of Temperature TPC 11. tON /tOFF Times vs. Temperature TPC 12. On Response vs. Frequency 10m TA = 25 C 1m ATTENUATION - dB 0 0 VDD = 5V TA = 25 C -20 ATTENUATION - dB -40 VDD = 5V TA = 25 C -20 CURRENT - A 100 VSS = +3V VDD = -3V VDD = 5V VSS = GND -40 10 1 -60 -60 -80 -80 100n VSS = 3V VDD = GND -100 -120 30k -100 -120 30k 10n 0.1 1 10 100 1000 FREQUENCY - kHz 10000 100k 1M 10M FREQUENCY - kHz 100M 100k 1M 10M FREQUENCY - kHz 100M TPC 13. Input Current, IDD vs. Switching Frequency TPC 14. Off Isolation vs. Frequency TPC 15. Crosstalk vs. Frequency 30 VDD = +3V VSS = -3V 20 TA = 25 C QINJ - pC VDD = 3V VSS = GND 10 0 VDD = 5V VSS = GND -10 -3 -2 -1 0 1 2 VOLTAGE - V 3 4 5 TPC 16. Charge Injection vs. Source Voltage -8- REV. 0 ADG733/ADG734 Test Circuits IDS V1 IS (OFF) S VS D VS A S D VD NC S D ID (ON) A VD RON = V1/IDS Test Circuit 1. On Resistance VDD 0.1 F Test Circuit 2. IS (OFF) Test Circuit 3. ID (ON) VDD VS1B VS1A S1B S1A D1 RL 300 IN/EN VOUT CL 35pF ADDRESS DRIVE VS1A VOUT VS1B 50% 50% 90% 90% GND 0.1 F VSS tON tOFF VSS Test Circuit 4. Switching Times, tON, tOFF VDD 0.1 F VDD A2 A1 A0 VSS 3V VSS S1A S1B VS ENABLE DRIVE (VIN) 0V tOFF(EN) VO D1 GND RL 300 VO OUTPUT 0V tON(EN) 0.9V0 0.9V0 50% 50% ADG733 EN VIN 50 CL 35pF Test Circuit 5. Enable Delay, tON (EN), tOFF (EN) VDD 0.1 F VDD ADDRESS* VIN 50 SA SB VS 0V 3V ADDRESS ADG733/ ADG734 D1 GND VSS RL 300 CL 35pF VOUT VS VOUT 80% 80% 0.1 F tOPEN VSS *A0, A1, A2 FOR ADG733, IN1-4 FOR ADG734 Test Circuit 6. Break-Before-Make Delay, tOPEN REV. 0 -9- ADG733/ADG734 VDD VDD VSS VSS 3V LOGIC INPUT (VIN) 0V S EN* VIN GND D CL 1nF VOUT VOUT VOUT QINJ = CL VOUT ADG733/ ADG734 RS VS * IN1-4 FOR ADG734 Test Circuit 7. Charge Injection VDD 0.1 F 0.1 F VDD VDD S VS IN/EN GND 0.1 F VSS VOUT D RL 50 GND VDD D VOUT RL 50 VS S D 50 S VSS NC VSS SWITCH OPEN FOR OFF ISOLATION MEASUREMENTS SWITCH CLOSED FOR BANDWIDTH MEASUREMENTS OFF ISOLATION = 20LOG10(VOUT/VS) VOUT WITH SWITCH INSERTION LOSS = 20LOG10 VOUT WITHOUT SWITCH 0.1 F VSS CHANNEL-TO-CHANNEL CROSSTALK 20 LOG |VS /VOUT | ( ) NC = NO CONNECT Test Circuit 8. OFF Isolation and Bandwidth Test Circuit 9. Channel-to-Channel Crosstalk -10- REV. 0 ADG733/ADG734 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 16-Lead TSSOP (RU-16) 0.201 (5.10) 0.193 (4.90) 20-Lead TSSOP (RU-20) 0.260 (6.60) 0.252 (6.40) 16 9 20 11 0.177 (4.50) 0.169 (4.30) 0.256 (6.50) 0.246 (6.25) 1 8 0.177 (4.50) 0.169 (4.30) 0.256 (6.50) 0.246 (6.25) 1 10 PIN 1 0.006 (0.15) 0.002 (0.05) 0.0433 (1.10) MAX PIN 1 0.006 (0.15) 0.002 (0.05) 0.0433 (1.10) MAX SEATING PLANE 0.0256 (0.65) 0.0118 (0.30) BSC 0.0075 (0.19) 0.0079 (0.20) 0.0035 (0.090) 8 0 0.028 (0.70) 0.020 (0.50) SEATING PLANE 0.0256 (0.65) 0.0118 (0.30) BSC 0.0075 (0.19) 0.0079 (0.20) 0.0035 (0.090) 8 0 0.028 (0.70) 0.020 (0.50) 16-Lead QSOP (RQ-16) 0.197 (5.00) 0.189 (4.80) 16 9 0.157 (3.99) 0.150 (3.81) 1 8 0.244 (6.20) 0.228 (5.79) PIN 1 0.059 (1.50) MAX 0.069 (1.75) 0.053 (1.35) 0.010 (0.25) 0.004 (0.10) 0.025 (0.64) BSC 8 0 0.012 (0.30) SEATING 0.010 (0.20) 0.008 (0.20) PLANE 0.007 (0.18) 0.050 (1.27) 0.016 (0.41) REV. 0 -11- PRINTED IN U.S.A. C01602-2.5-1/01 (rev. 0) |
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